Senior Analog/Mixed Signal Engineer
Job Summary
We are seeking a Senior Analog/Mixed Signal Engineer to design and implement critical circuit building blocks for next generation thermodynamic computing chips. This role offers the opportunity to contribute at the ground level of an emerging compute paradigm that promises significant power efficiency gains over traditional AI accelerators. You will work across analog, mixed signal, and probabilistic domains in a dynamic startup environment where hands on contributions are expected from every team member.
Essential Functions
- Design analog and mixed signal building blocks including ADCs, PLLs, band gaps, regulators, oscillators, high speed dividers, and serializer/deserializers
- Own block level design from architecture and schematic capture through layout supervision and tape out verification including DRC, ERC, and LVS
- Perform hands on layout work along with comprehensive simulations in Cadence using PEX, Monte Carlo, and corner analysis
- Support lab testing and validation of mixed signal circuits with equipment such as signal generators, spectrum analyzers, and oscilloscopes
- Collaborate cross functionally with IC design, systems, physics, and algorithms teams to develop thermodynamic sampling units from concept through silicon
- Contribute to multiple upcoming chip architectures following recent successful tape outs
Required Qualifications
- 3 to 6 years of experience in analog and mixed signal IC design using CMOS technology
- Experience with analog and mixed signal circuit blocks such as comparators and PLLs
- Multiple tape out cycles with strong background in CMOS processes
- Proficiency with Cadence simulation tools including PEX, Monte Carlo, and corner analysis
- MS or PhD in Electrical Engineering with focus on analog or mixed signal design
- Willingness to perform hands on unglamorous circuit work beyond primary specialty
- Mixed signal design experience beyond purely analog background
Preferred Qualifications
- Experience with FinFET or lower process nodes such as 28nm or 65nm
- Background in probabilistic or thermodynamic circuit design
- Prior work in fast paced startup environments
- Hands on lab validation experience with mixed signal circuits
Technical Skills
- Cadence Virtuoso
- CMOS design (FinFET, 28nm, 65nm)
- PEX extraction and simulation
- Monte Carlo analysis
- Corner analysis
- PLL and ADC design
- High speed serializer/deserializer circuits
- Python and C programming
- Mixed signal verification flows
Education & Certifications
MS or PhD in Electrical Engineering with a focus on analog or mixed signal design is required.
Compensation & Benefits
Base salary range is 160000 to 300000 depending on experience and qualifications. This is a hybrid role requiring three days per week in the Boston office.